Exam Details
Subject | Modeling And Testing Of Digital Systems | |
Paper | ||
Exam / Course | Diploma In Electronics And Communication Engineering (DECVI)/ Advanced Level Certificate Course In Electronics And Communication Engineering (ACEVI)/ | |
Department | School of Engineering & Technology (SOET) | |
Organization | indira gandhi national open university | |
Position | ||
Exam Date | December, 2016 | |
City, State | new delhi, |
Question Paper
No. of Printed Pages 3
B.Tech. -VIEP .... ELECTRONICS AND
COMMUNICATION ENGINEERING (BTECVI)
Term-End Examination
OOC:;l·< Decem.ber, 2016
BIELE·003 MODELLING AND TESTING OF
DIGITAL SYSTEMS
Time: 3 hours Maximum Marks: 70
Note: Attempt any seven questions. All questions carry equal marks. Missing if any, may be suitably assumed. Use of scientific calculator is permitted.
1. Explain data flow style and mixed style of modelling with the help of suitable examples.
2. Differentiate between Scalar and Integer data type with suitable examples. 5
Write a complete structural model for a 3-bit parity generator. 5
3. Differentiate between concurrent and sequential signal assignment with suitable examples. 5
Define Generics. Write an entity for an AND gate which has nine generics. 5
4. Explain Inertial and Transport delay models. 5
Write the entity for routing delay model. 5
5. What is VHDL Explain the historic view and capabilities of this language in detail. 10
6. What are the advantages of behavioural fault modelling? 5
Derive a test set for a two-to-one multiplexer for the functional fault model. 5
7. Explain the term fault modelling. Also name the different types of fault models. 5
Differentiate between structural and functional fault models. 5
8. Derive the four-valued truth table of fault free versions of each of the following: 5
A two-input AND gate
A two-input NOR gate
Explain the structure of n-stage Linear Feedback Shift Register (LFSR). 5
9. Explain Random testing. Also derive the escape probability of fault.
Explain the test points to improve testability.
10. How will creating an internal line of circuit, through an observation point, improve the random pattern testability of the circuit 5
Explain the architecture of field programmable gate array by taking a suitable example. 5
B.Tech. -VIEP .... ELECTRONICS AND
COMMUNICATION ENGINEERING (BTECVI)
Term-End Examination
OOC:;l·< Decem.ber, 2016
BIELE·003 MODELLING AND TESTING OF
DIGITAL SYSTEMS
Time: 3 hours Maximum Marks: 70
Note: Attempt any seven questions. All questions carry equal marks. Missing if any, may be suitably assumed. Use of scientific calculator is permitted.
1. Explain data flow style and mixed style of modelling with the help of suitable examples.
2. Differentiate between Scalar and Integer data type with suitable examples. 5
Write a complete structural model for a 3-bit parity generator. 5
3. Differentiate between concurrent and sequential signal assignment with suitable examples. 5
Define Generics. Write an entity for an AND gate which has nine generics. 5
4. Explain Inertial and Transport delay models. 5
Write the entity for routing delay model. 5
5. What is VHDL Explain the historic view and capabilities of this language in detail. 10
6. What are the advantages of behavioural fault modelling? 5
Derive a test set for a two-to-one multiplexer for the functional fault model. 5
7. Explain the term fault modelling. Also name the different types of fault models. 5
Differentiate between structural and functional fault models. 5
8. Derive the four-valued truth table of fault free versions of each of the following: 5
A two-input AND gate
A two-input NOR gate
Explain the structure of n-stage Linear Feedback Shift Register (LFSR). 5
9. Explain Random testing. Also derive the escape probability of fault.
Explain the test points to improve testability.
10. How will creating an internal line of circuit, through an observation point, improve the random pattern testability of the circuit 5
Explain the architecture of field programmable gate array by taking a suitable example. 5
Other Question Papers
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Subjects
- Advance Microprocessor And Architecture
- Analog And Mixed Mode Vlsi Design
- Analog Communication
- Analog Electronic Circuits
- Analog Integrated Circuits Design
- Antennas And Propagation
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- Basic Telematics
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- Dip- ECE PCB Design & Testing
- Electromagnetic Field Theory
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- Electronic Product Design
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- Information Theory And Coding
- Linear Integrated Circuits
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- Micro Controller
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- Microelectronics Technology
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- Microprocessor And Its Applications
- Microwave And Radar Engineering
- Modeling And Testing Of Digital Systems
- Multirate Systems
- Nano - Electronics
- Optical Fiber Communication
- Opto Electronics Communication Systems
- Power Electronics
- Principles of Communication Engineering
- Quantum Communication
- Rf Circuits
- Satellite And Tv Engineering
- Signal Compression
- Signals And Systems
- Technical English
- Television Engineering
- Wireless Communication