Exam Details

Subject electrical engineering
Paper paper 2
Exam / Course mcscc
Department
Organization manipur public service commission
Position
Exam Date 2013
City, State manipur,


Question Paper

Electrical Engineering Paper
Time allowed: Three hours Maximum Marks: 300
The fif,TUreS in the right margin indicate full marks for the questions Note: Attempt total 5 questions. Question no 1 and 5 are compulsory. Attempt any other three, selecting at least one from each Section. Assume suitable data ifnotprovided. SECTION-A
1. a. Answer Why
Low voltage winding is placed near the core in tnmsformers? 20
Transfonner rating is expressed in VA or kVA?
Magnetising current ofinduction motor is much higherthan transformer?
Short circuit test ina transformer is perfonnedonHV side?
A3-phase induction motor operates at very low power factor atno load?
b. Draw and explain the pOver distribution in a 3-phase induction motor with the help of
equivalent circuit. 20
c. The open circuit and short circuit test result ofa 200 kVA, II kV/400V, delta-star distribution
transformer are as follows ­20
a.c. Test-400V: 9 1.5 kW
S.c. Test -350V, rated current, 2.1 kW
Calculate the equivalent circuit parameters referred to h. v. side and its efficiency at half-full
load ofunity power factor.
2 a. Derive an expression for the emfinduced in a transformer winding. Show that emfper tum in
primary is equal to the emfper turn in secondary. 20
b. Classify and list various methods of speed control of an induction motor. Explain and
compare star-delta and auto-transformer stater. 20
c. An industrial unit has a total load of 1800 kW at a p. f. of0.6 lagging. Ifis desired to improve
the p.f to 0.9 lagging with the installation ofa synchronous condenser, then calculate­20
a. TIle kVArating ofthe synchronous condenser, and
b. Total kVAofthe unit.



3. a. b. Compare the working ofan induction motor with a synchronous motor (preferably in tabular form 20 For the circuit shown below fmd VCE and VAG' 20
c. A E 8 F 5 7 j 40V 20V II IOV I 5 l 9 D H Find the Thevenin and Norton equivalentcircuits for the active network shown below: 20


4. a. Determine the open circuit and short circuit impedances ofthe network shown below: 20
4

IO-lwv­
3
VI
V
2



b.
A 3-phase source is feeding a delta connected balanced load. Establish the phase relation shipofphaseandlinequantities(bothvoltagesandcurrents)usingphasesequenceRYB. 20

c.
Detennine the z-transform of the output for the sampled-data System shown below, considering unit step input function. 20



A•

Input
T Output
2
SECTION-B
5. a. Answer briefly (any four) 20
1. Two discrete diodes connected back to back can not be used as a tran istor. Why?
ii. Which configuration oftransistor is preferred for voltage matching and why?
Ill. The base ofa transistor is lightly doped and very thin, why?
IV. CE configuration is widely used in all the transistor applications. Why?
v. Input impedance ofFET is more than BlT. Why?
b In the given network V=lO R =10 ohms, I Hand C 10 uF and O. Find
and d2iJde(0+). 20


c. I. Find the minimized fOffi1 ofthe logical expression 20
(ABC ABC ABC ABC)
11. Realise the Boolean functionY =AB +CD using maximum three 2-input NAND gates.
6 a. Write the requirements ofthe transistor biasing circuit. Explain base register biasing ofa BlT
and write its advantages and disadvantages. 20
b. Differentiate natural and commutation with an example. 20
c. A thyristor is connected in series with an L-C series circuit and a source voltage of200 V If
the thyristor is switched on at t determine the conduction time of the thyristor and
capacitor voltage after it is switched off. 20
The circuit parameters are 10 I-lH and C The inductor carries an initial current of
250mA.
7 a. Draw the schematic diagram of half-bridge and full-bridge dc-ac inverter, list their
comparative advantages and disadvantages. Draw the output voltage and current waveform
for RL load, and Purely inductive load for half-bridge inverter. What is the
conduction angle 1n each case? 20
b. List the advantages and disadvantages ofFET. Explain the working principle ofFET as an
amplifier. 20
3


c. Determine the output voltage for the damper circuit shown below. Determine the time constant and check whether this circuit will satisfy the condition of effective clamping or not. Identify the circuit as positive! negative damper. 20
VI
0.2 uF


C D
V
t
Ro IOOK,Q 5V T0
0 f=l KHz
8. a. Simplify the four variable logic function
using K-map. Also implement the simplified expression with AND-OR logic. 20
b.
State Maxwell's equations in their general differential form and derive their form for harmonically varying fields. 20

c.
Findthevelocity ofaplanewaveinaloss-lessmediumhavingarelativepermittivity of5and relative permeability ofunity. 20


4


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