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Seat No.: Enrolment
GUJARAT TECHNOLOGICAL UNIVERSITY
DIPLOMA ENGINEERING SEMESTER IV • EXAMINATION SUMMER- 2017
Subject Code: 340702 Date: 29- 04 -2017
Subject Name: Computer Organization and Architecture
Time: 10:30 AM TO 01:00 PM Total Marks: 70
Instructions:
1. Attempt all questions.
2. Make suitable assumptions wherever necessary.
3. Figures to the right indicate full marks.
4. Each question carry equal marks (14 marks)
Q.1

Draw and explain 4 bit arithmetic circuit.
07


4 bit arithmetic circuit
07

Explain bus transfer and three state buffer.


bus transfer three state buffer

Q.2

Explain direct and indirect addressing
07


direct and indirect addressing
07

Explain interrupt cycle.


interrupt cycle

OR

Explain different phases of instruction cycle.
07

instruction cycle phases
Q.3

Explain characteristics of RISC and CISC processor.
07


RISC CISC processor characteristics
07

Explain different types of interrupts.


interrupts

OR
Q.3

Explain different types of addressing modes.
07


addressing modes
07

Explain execution of PUSH and POP instructions.


PUSH POP instructions execution

Q.4

What is the difference between main memory and control memory?
07


main memory control memory
07

Explain arithmetic pipeline.


arithmetic pipeline

OR
Q.4

Explain address sequencing.
07


address sequencing
07
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Explain instruction pipeline.


instruction pipeline

Q.5

Explain DMA controller.
07


DMA controller
07

Explain RAM chip with diagram.


RAM chip

OR
Q.5

Explain strobe control method of asynchronous data transfer.
07


asynchronous data transfer strobe control method
07

Explain page tables, page hits and page faults.


page tables, page hits page faults