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Reg. No........................ Name......................................
APJ ABDUL KALAM TECHNOLOGICAL UNIVERSITY
FOURTH SEMESTER B.TECH DEGREE EXAMINATION, JUNE 2017
Course Code: EE 204
Course Name: DIGITAL ELECTRONICS AND LOGIC DESIGN
Max. Marks: 100 Duration: 3 Hours
PART A
Answer all questions. Each question carries 5 marks
1. Create a table showing 4 bit Gray Code and the corresponding Binary Code.
Explain how the table is derived.
2. Using K Map derive the reduced Boolean expression for the following function.
f A B C D Σ m d 2,5
3. Draw the truth table for a full subtractor. Reduce it using K Map. Implement it using
logic gates.
4. Realize a J K Master Slave flip flop using NAND gates. Explain its working
5. Differentiate between Asynchronouscounters and Synchronous counters with the help
of diagrams. What are the advantages and disadvantages
6. Design a 4 bit Ring counter. Draw the Truth Table and the waveform.
7. Analyse the working of a R-2R ladder Digital to Analog converter with the help of a
diagram.
8. Design a Full Adder using VHDL.
PART B
Answer any two questions. Each carries 10 marks.
9. Differentiate between the methods of binary subtraction using complement and
2'scomplement. Show an example in each case with 4 bit numbers.
Determine the range of numbers in complement and compliment for word
length of 8 bit and 16 bit.
10. Simplify using K Map.
F A B C D M 1 3 5 7 13 15
State and prove De Morgan's theorem.
11. Express the following function as a sum of minterms.
F B C BD
Draw the circuit diagram of a typical TTL gate and explain.
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PART C
Answer any two questions. Each question carries 10 marks.
12. Describe the working of a Carry Look Ahead Adder using the example of 4 bit
numbers. Clearly show the derivations of the equations. Show the implementation in
Hardware.
13. Realize the following function using 4×1 multiplexer.
F A B C Σ m 1 3 5 6
Design a BCD to Decimal decoder. Write down the Truth Table, Boolean
expressions and show the Hardware implementation.
14. Draw a 4 bit Asynchronous up counter and discuss its characteristics. Draw the
waveforms.
Draw a 4 bit Serial-In-Parallel-Out shift register and explain its working.
PART D
Answer any two questions. Each question carries 10 marks.
15. Design a Mod 6 Synchronous counter. Enumerate all the steps in the design.
16. Design a two bit flash type Analog to Digital converter. Explain its working.
Compare and contrast between ROM, PROM and EPROM.
17. Describe the structure of a Programmable Logic Array. Take a simple example and
explain.