Hall Ticket No Question Paper Code: AEC002
INSTITUTE OF AERONAUTICAL ENGINEERING
(Autonomous)
B.Tech III Semester End Examinations (Supplementary) January/February, 2018
Regulation: IARE R16
DIGITAL SYSTEM DESIGN
(Electronics and Communication Engineering))
Time: 3 Hours Max Marks: 70
Answer ONE Question from each Unit
All Questions Carry Equal Marks
All parts of the question must be answered in one place only
UNIT I
1. If a hamming code is constructed using even parity and the received code is 1110110.Detect and
correct errors if any.
Convert the following into Excess-3 Code
i. (4B9)16
ii. (58)10
2. Convert the following.
i. (4C9)16
ii. (11011:11)2 )10
Represent the following decimal numbers in BCD format
9
25
UNIT II
3. Use the tabular method obtain the minimal expression for
F
P
10; 14; 15)
What are the limitations of K-Maps.
4. Minimize the following expressions using K-Map and implement using logic gates.

Convert the following Sum of Product(SOP) to Product of Sums(POS)
F A0BC0 ABC A0B0C AB0C ABC0
UNIT III
5. Design 3-bit binary to gray code converter using basic gates NAND gates and NOR gates.
Design full adder combinational logic network using minimum number of NAND gates only.
Page 1 of 2
6. Design a combinational circuit whose output is true for two bit BCD input.
Design two bit BCD adder and explain its operation.
UNIT IV
7. Convert J-K Flip-Flop to S-R Flip-Flop.
With the help of logic Diagram and Functional Table explain the operation of 4-bit Johnson
counter
8. Sketch the logic networks for MOD-5 Johnson counter and explain its operation.
Design a Mod-6 Synchronous counter using clocked T flip-flops.

UNIT V
9. Differentiate between Mealy Machine and Moore Machine.
Minimize the State Table using Partition Technique as shown in Table-1
Table 1
PS NS,Z
X=0 X=1
A E,0 D,1
B F,0 D,0
C E,0 B,1
D F,0 B,0
E C,0 F,1
F B,0 C,0
10. Write the state table for the state diagram shown in figure-1
Figure 1
With an example, explain what is state reduction and also mention its advantages