Hall Ticket No Question Paper Code: BES004
INSTITUTE OF AERONAUTICAL ENGINEERING
(Autonomous)
M.Tech II Semester End Examinations (Regular Supplementary) July, 2018
Regulation: IARE-R16
EMBEDDED SYSTEM ARCHITECTURE
(Embedded Systems)
Time: 3 Hours Max Marks: 70
Answer ONE Question from each Unit
All Questions Carry Equal Marks
All parts of the question must be answered in one place only
UNIT I
1. Explain the classification of major hardware components of embedded boards.
Briefly discuss examples for different types of ISA operation that can be performed on data by
embedded processors.
2. Explain different memory addressing modes of embedded processor ISA.
Briefly describe the architecture of superscalar ISA implementation with an example.
UNIT II
3. Give the comparison of Level-1 cache in the Von Neumann and Harvard processor models.[7M]
Briefly discuss different measures of processor performance.
4. Explain different schemes of data storage in cache.
Briefly discuss the connectivity pattern among ports and device controllers on an embedded
board in I/O subsystem circuitry.
UNIT III
5. Illustrate dynamic centralized and parallel arbitration scheme implemented by PCI bus to allow
multiple bus master.
Briefly discuss the solutions for improving the performance of memory.
6. Enumerate how the different signals can function for a memory read and memory write in SRAM.

Explain how memory controller sample circuit provide glueless interfaces to the different types
of memory in the system.
UNIT IV
7. Write the pseudocode to demonstrates possible initial FTP connection mechanism within an FTP
client application in which access control commands are transmitted to an FTP site.
List and explain different SMTP commands and rely codes.
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8. Explain HTTP request and response message formats.
Illustrate how JVM can be implemented within a system middleware and list different networking
APIs in java.net package.
UNIT V
9. Explain the architecture business cycle of an embedded device, which influences the architecture
of an embedded system.
Briefly discuss different guidelines for documenting the architecture.
10. Illustrate the process of authorization and authentication tactics that could be used to allow a
device to track external sources thereby increasing system security.
List and briefly explain different models in testing.