Exam Details

Subject cpld and fpga architectures and applications
Paper
Exam / Course computer science and engineering
Department
Organization Vardhaman College Of Engineering
Position
Exam Date January, 2018
City, State telangana, hyderabad


Question Paper

Hall Ticket No:
Question Paper Code B3455
(AUTONOMOUS) M. Tech I Semester Regular Examinations, January 2018
(Regulations: VCE-R15) CPLD AND FPGA ARCHITECTURES AND APPLICATIONS
(Digital Electronics and Communication Systems) Date: 08 January, 2018 FN
Time: 3 hours
Max Marks: 70
Answer any FIVE Questions
Each Question carries equal marks
1.
Explain different types of don't-cares used in combinational logic.
7M
Briefly discuss the characteristics of FPGA that distinguishes FPGA from PLD.
7M
2.
Briefly discuss the relationship of irredundancy over minimality.
7M
Explain different components of Field-Programmable Gate Array (FPGA) with the help of architecture diagram.
7M
3.
Give the comparison among flash and SRAM-based FPGAs programming technology.
7M
Explain the architecture of SRAM-controlled programmable switches.
7M
4.
List and explain the functions of I/O pins on a fabric chip to connect to outside world.
7M
Enumerate the organization of pass-transistor and three-state buffer-based programmable interconnection points.
7M
5.
Explain the methodology for evaluating FPGA fabrics.
7M
Illustrate the concept of routing delays for a number of different fabrics that have different proportions of segment lengths.
7M
6.
Briefly discuss rent's rule for characterization of the relationship between logic and pins.
7M
Explain different clocking discipline rules.
7M
7.
Design a simple four-input, three-output PAL device by taking an example.
7M
Explain different elements of Altera FLEX 8000 with the help of block Diagram.
7M
8.
Illustrate the relationship between logic expressions and gate networks.
7M
Illustrate different steps in implementing an even parity logic design.
7M


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