Birla Institute Of Technology & Science announced job notification for the positions of Junior Research Fellow (JRF) in the department of and in section of , . This job position Junior Research Fellow (JRF) located in Ranchi and in state jharkhand. This job position is categorized as '' jobs.

The educational qualifications for this job position Junior Research Fellow (JRF) specified as M.E. / M.Tech. in Electronics and Communication Engineering and related disciplines OR B.E./B.Tech. in Electronics and Communication Engineering with GATE qualification. Desirable: (1) Knowledge on CMOS analog VLSI design and CMOS analog layout. (2) Knowledge of transistor level circuit simulation tool. (3) Candidates with working experience on analog VLSI domain will get preference.. Eligibility conditions for job position Junior Research Fellow (JRF) mentioned as and required experience levels for this job position Junior Research Fellow (JRF) are as follows .

The salary or payscale for Junior Research Fellow (JRF) is Rs. 25000/-.

The total number of vacancies or positions are 1. Out of which for General/Un-Reserved/OC (Other Castes) vacancies are 0. For OBC (Other Backward Classes) total positions reserved are 0. For SC (Scheduled Castes) category job positions reserved are 0 and for ST (Scheduled Tribes) category job positions reserved are 0. For all other categories of reservations total positions alloted are .

The minimum and maximum age limits to apply for job Junior Research Fellow (JRF) is minimum age limit is 0 and maximum age limit is 0.

The more and other important information related to this job specified as Tenure: 2 years 6 months (extendable annually till completion of the project, subjected to satisfactory performance). How to apply: Interested candidates are requested to appear the Walk-in interview on 19/01/2018 (Friday) along with recent Curriculum Vitae including educational qualifications (with percentage of marks or CGPA in each degree) and research/working experience/interests, contact information (phone number and email ID) and a passport size photograph. Candidates are requested to report at 10:00AM on 19/01/2018 (Friday) in the office of Department of Electronics and Communication Engineering, BIT Mesra, Ranchi, Jharkhand. Job Description: Purely research in CMOS analog VLSI Design (Topic: power conditioning circuit for Piezoelectric energy harvester). Dr. Sudip Kundu (kundu.sudip@gmail.com).

Important dates to be remembered related to this notification are as follows.
Date of Issue of Notificaition : . Applications will be issued from date and last date to submit applications is . The admit cards will be issued from to . The Priliminary Examinations will start from and will lasts upto date of . The Preliminary Examinations Results will be announced on date . The Main Examinations will start from date and will ends on . The answer keys for mains examinations will be announced on . The results for Main Examinations will be declared or announced on date . Job Interviews for this job positions Junior Research Fellow (JRF) will be held from date and will ends on date . The final results or shortlisted persons for this job Junior Research Fellow (JRF) will be announced on .

This notification issued by which is located in city and in state .

For More Details related to this Notificaition, for Complete Job Details and for complete Notificaition, Please visit the official website of organization .

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Job Organization / Department

• birla institute of technology & science

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Job Positions

• Junior Research Fellow (JRF)

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Job Educational Qualifications

• m.e. / m.tech. in electronics and communication engineering and related disciplines or b.e./b.tech. in electronics and communication engineering with gate qualification. desirable: (1) knowledge on cmos analog vlsi design and cmos analog layout. (2) knowledge of transistor level circuit simulation tool. (3) candidates with working experience on analog vlsi domain will get preference.

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Job Eligibility Details

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Job Experience Requirements

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Job City, State

• Ranchi, jharkhand

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Job Total Vacancies

• 1

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Job Reservation Details

• General / Un-Reserved : 0
• OBC : 0
• SC : 0
• ST : 0
• Others :

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Job Payscale / Salary

• Rs. 25000/-

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Job Age Details

• Minimum Age : 0
• Maximum Age : 0

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Job More Information

• tenure: 2 years 6 months (extendable annually till completion of the project, subjected to satisfactory performance). how to apply: interested candidates are requested to appear the walk-in interview on 19/01/2018 (friday) along with recent curriculum vitae including educational qualifications (with percentage of marks or cgpa in each degree) and research/working experience/interests, contact information (phone number and email id) and a passport size photograph.
• candidates are requested to report at 10:00am on 19/01/2018 (friday) in the office of department of electronics and communication engineering, bit mesra, ranchi, jharkhand. job description: purely research in cmos analog vlsi design (topic: power conditioning circuit for piezoelectric energy harvester). dr. sudip kundu (kundu.sudip@gmail.com).

	Start Date	End Date
Notification Issued
Applications
Admit Cards
Examinations (Preliminary)
Exam Results (Preliminary)
Examinations (Mains)
Answer Keys
Exam Results (Mains)
Interviews		19-Jan-2018
Final Results

• Organization :
• Organization City, State :
• Organization Website :